Spec: Registers & Counters

Overview

Add a library of sequential logic building blocks including shift registers, parallel registers, and various counter types. These are essential components for building state machines, data pipelines, and timing circuits.

Motivation

Flip-flops are the atomic sequential elements, but practical designs always use groups of flip-flops working together. Providing pre-built registers and counters saves significant design time and reduces wiring errors, enabling users to focus on higher-level architecture.

Requirements

Functional Requirements

Registers

1. N-bit Parallel Register: Load N bits simultaneously on clock edge. Configurable width (4/8/16).
2. Shift Register (SISO): Serial-In Serial-Out, configurable length.
3. Shift Register (SIPO): Serial-In Parallel-Out, configurable length.
4. Shift Register (PISO): Parallel-In Serial-Out, configurable width.
5. Shift Register (PIPO): Parallel-In Parallel-Out (universal shift register).
6. Universal Shift Register: Supports left/right shift, parallel load, hold (controlled by mode select).

Counters

7. Binary Up Counter: N-bit, synchronous, with terminal count output.
8. Binary Down Counter: N-bit, synchronous, with borrow output.
9. Binary Up/Down Counter: Direction controlled by input signal.
10. BCD Counter (Decade): Counts 0–9, reset on overflow.
11. Ring Counter: Circulating single-bit pattern.
12. Johnson Counter: Twisted ring counter (2N states from N flip-flops).
13. Programmable Counter: Loadable preset value, counts to zero, generates terminal count.

Common Features

14. Synchronous Reset: All registers/counters support clock-synchronous reset.
15. Asynchronous Clear: Immediate reset regardless of clock.
16. Enable Input: Count/shift only when enabled.
17. Cascade Support: Terminal count/carry output for chaining multiple counters.

Non-Functional Requirements

• All components support configurable clock edge (rising/falling).
• Visual state display shows current register/counter value during simulation.
• Components are compact enough to use in larger designs without excessive canvas space.

Design

Component Hierarchy

Components/Sequential/
├── Registers/
│   ├── ParallelRegister.cs
│   ├── ShiftRegisterSISO.cs
│   ├── ShiftRegisterSIPO.cs
│   ├── ShiftRegisterPISO.cs
│   └── UniversalShiftRegister.cs
└── Counters/
    ├── BinaryUpCounter.cs
    ├── BinaryDownCounter.cs
    ├── BinaryUpDownCounter.cs
    ├── BcdCounter.cs
    ├── RingCounter.cs
    ├── JohnsonCounter.cs
    └── ProgrammableCounter.cs

State Model

public class BinaryUpCounter : Component
{
    private int _count;
    public int Width { get; set; } = 4;  // configurable
    public int MaxCount => (1 << Width) - 1;

    public override void Evaluate()
    {
        if (AsyncClear.IsHigh) { _count = 0; }
        else if (Clock.IsRisingEdge && Enable.IsHigh)
        {
            _count = (_count + 1) & MaxCount;
        }
        TerminalCount.SignalState = (_count == MaxCount) ? Signal.High : Signal.Low;
        // Set output pins from _count bits...
    }
}

Rendering

• Rectangular body with component type label ("CTR", "SRG", "REG").
• Pin groups clearly separated: data, control (CLK, EN, CLR), outputs.
• During simulation: display current value in hex/decimal inside the component body.

Toolbox Organization

New sub-category under existing "Sequential" or new "Registers & Counters" category:

• Registers (Parallel, Shift variants)
• Counters (Binary, BCD, Ring, Johnson, Programmable)

Implementation Tasks

1. Create Components/Sequential/Registers/ and Counters/ directories.
2. Implement ParallelRegister with configurable width.
3. Implement shift register variants (SISO, SIPO, PISO, Universal).
4. Implement binary counters (Up, Down, Up/Down) with configurable width.
5. Implement BCD decade counter.
6. Implement Ring and Johnson counters.
7. Implement Programmable counter with preset load.
8. Add common control inputs (Enable, Clear, Reset) to all components.
9. Create JSON shape definitions with value display area.
10. Add components to toolbox and write documentation.

Risks & Open Questions

• Should width be configurable at runtime (property dialog) or fixed per component variant?
• Interaction with bus pins: should N-bit data ports use bus connections?
• How to display the internal state value — inside the component shape or as a tooltip?
• Should counters support custom count sequences (arbitrary modulus)?

Priority

High — Complements flip-flops and enables practical sequential design.